Fifth Edition of DVCon Europe Experiences Continued Growth, Driven by a Strong, Innovative Technical Program

Conference Covered Innovative Trends, Including Virtualization and System Modeling Leveraging the Digital Twin Concept

Munich, Germany, 27 November 2018 - The Design and Verification Conference & Exhibition Europe (DVCon Europe) 2018, sponsored by Accellera Systems Initiative, saw record attendance, representing 20% growth over the previous year. This year’s impressive technical program, which discussed notable new concepts across multiple areas, was a primary reason for the significant growth of the premier European electronic design and verification conference.

Approximately half the 330 participants were attending for the first time and attendees represented more than 70 different companies and organizations from 27 countries. The DVCon Europe Exhibition was sold-out, attracting 22 exhibitors from leading Electronic Design Automation (EDA) and service companies. The number of industry-oriented paper and tutorial submissions increased again, resulting in a strong and expanded technical program.

“This year’s DVCon Europe brought a great mixture of innovative topics to the design and verification community, including functional safety, virtual prototyping, machine learning, portable stimulus, RISC-V and much more,” noted Martin Barnasconi, DVCon Europe 2018 general chair. “I am pleased to see a growing interest throughout the engineering community in participating in DVCon Europe, to share their experiences on the application of EDA standards, languages and methodologies for SoC design and verification.”


DVCon Europe 2018 started with an insightful keynote from Dr. Stefan Jockusch, vice president of Strategy at Siemens PLM Software, a business unit of the Siemens Digital Factory Division, covering “Driving Digitalization With A Boundary Free Innovation Platform.” In his keynote, Dr. Jockusch presented how the concept of the Digital Twin is enabling autonomous driving, additive manufacturing, IoT technology and many other applications.

The first day featured a series of 16 tutorials, providing attendees with a rich choice of technical updates and instruction on subjects including UVM-based Verification, SystemC System Level Verification, Safety-Critical Verification, Accellera’s emerging Portable Stimulus Standard, Formal Verification and Analog/Mixed-Signal Design and others.  Specific interest tutorials gave insights into Machine Learning and RISC-V based development.

The second day started with a keynote from Philippe Magarshack, Group Vice President Microcontrollers and Digital ICs at ST Microelectronics, entitled, “Accelerating IoT Device Development - from Silicon to Developer Tools.” Mr. Magarshack’s keynote highlighted a number of challenges for chipmakers to enable successful, first-time silicon and the fast bring-up of IoT SoCs, also leveraging the Virtual Twin concept at ST Microelectronics.

The 2018 DVCon Europe technical program expanded to four parallel tracks over the 2017 conference, featuring 36 paper sessions covering topics such as UVM, Formal, Mixed Signal, SystemC, and Advanced Verification Techniques.

DVCon Europe hosted two panel sessions. The first, entitled “Using Next Generation Methods of Systems Modeling and Virtual Prototyping to Revolutionize the Design, Verification and Manufacture of High Value, Complex Electromechanical Products across the Automotive Supply Chain” discussed the use of Virtual Platforms for Automotive design. The second “Accellera Town Hall Meeting and Q&A” panel covered standardization activities and plans in an interactive session.

The award for Best Paper, as voted by conference attendees and the technical program committee, went to Thilo Vörtler, Karsten Einwich from COSEDA Technologies and Muhammad Hassan, Daniel Grosse from University of Bremen & DFKI GmbH for their paper, entitled “Using Constraints for SystemC AMS Design and Verification.”

For more information about the DVCon Europe program, blogs and plans for 2019, visit

The 3rd edition of Accellera’s SystemC Evolution Day was organized as co-located event one day before DVCon Europe. With more than 70 participants, the SystemC community came together to discuss enhancements and extensions for the SystemC standards and its eco-system. This included discussion on topics like Configuration, Control and Inspection (CCI), Multi-Language support, AMS extensions and Transaction-level Modeling concepts for serial buses.

For more information about the SystemC Evolution Day, visit


DVCon Europe 2019 will be held at the Holiday Inn in Munich, Germany on October 29th and 30th, collocated with the Accellera SystemC Evolution Day to be held on October 31st.

DVCon U.S. 2019 will be held February 25th – 28th, 2019 at the DoubleTree Hotel in San Jose, CA. DVCon China will take place at the Doubletree by Hilton Shanghai-Pudong Hotel, Shanghai on April 17th, 2019.


The Design and Verification Conference & Exhibition in Europe (DVCon Europe) is the leading European event covering the application of languages, tools and intellectual property for the design and verification of electronic systems and integrated circuits. Sponsored by  Accellera Systems Initiative, and one of several DVCon events around the globe, DVCon Europe brings chip architects, design & verification engineers, and IP integrators the latest methodologies, techniques, applications and demonstrations for the practical use of EDA solutions for electronic design. For more details, visit


Accellera Systems Initiative (Accellera) is an independent, not-for profit organization, dedicated to create, support, promote and advance system-level design, modeling and verification standards for use by the worldwide electronics industry. The organization accelerates standards development and, as part of its ongoing partnership with the IEEE, its standards are contributed to the IEEE Standards Association for formal standardization and ongoing change control. For more information, please visit For membership information, please  Email Contact.

ACCELLERA GLOBAL SPONSORS: Cadence, Mentor (a Siemens Company), Synopsys


Barbara Benjamin
HighPointe Communications

Review Article Be the first to review this article

Featured Video
Geodesign Manager for Design Workshop at Aspen, Colorado
GIS Analyst (Dallas Police) for City of Dallas at Dallas, Texas
GIS ANALYST I.8030200 for Dallas County at DALLAS, Texas
Failure Analysis Engineer for Flextronics at Milpitas, California
Mechanical Engineer for Flextronics at Milpitas, California
Upcoming Events
Digital Construction Week 2020 at Excel London United Kingdom - Oct 21 - 22, 2020
2020 Design-Build Conference & Expo! at Gaylord National Resort & Convention Center National Harbor MD - Oct 28 - 30, 2020
ABX | ArchitectureBoston Expo at Boston Convention & Exhibition Center Boston MA - Nov 4 - 5, 2020
Greenbuild 2020 at San Diego Convention Center San Diego CA - Nov 4 - 7, 2020
Kenesto: 30 day trial
Digital Cities - Countless CAD add-ons, plug-ins and more.

© 2020 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
TechJobsCafe - Technical Jobs and Resumes EDACafe - Electronic Design Automation GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise