Aldec Provides Finite State Machine Coverage for Verification of Safety-Critical FPGAs

HENDERSON, Nev. — (BUSINESS WIRE) — January 19, 2017Aldec, Inc. announced today the latest release of its mixed-language, FPGA Design & Simulation platform,  Active-HDL™ 10.4, providing Finite State Machine (FSM) Coverage for FPGA engineers developing safety-critical FPGAs. Safety-critical design assurance guidance and standards such as those defined in RTCA/DO-254 for Avionics, ISO 26262 for Automotive, and IEC 62566 for Nuclear Power Plants (NPP) Instrumentation & Control recommend the use of FSM Coverage as part of the overall verification process.

“FPGAs in the field used in safety-critical applications must function reliably as defined in the requirements under all foreseeable environmental conditions,” said Radek Nawrot, Aldec Software Product Manager. “This puts significant pressure on verification engineers which can be alleviated through use of the recommended FSM Coverage, a valuable addition to Aldec’s verification tools.”

FSM Coverage enables users to determine which states and transitions in the state machine diagram have been executed during simulation. To collect the FSM Coverage statistics, the HDL design code has to include SystemVerilog or Aldec proprietary pragmas indicating which constructs represent components of the state machine. The pragmas used in the HDL code are included in additional lines of comments and interpreted by the coverage engine.

The FSM Coverage statistics can be stored in the Aldec Coverage Database (ACDB) files and presented in a textual or HTML report along with OSVVM Functional Coverage providing complete structural coverage and functional coverage with test results merging, ranking and analysis.

About Active-HDL

Active-HDL is an FPGA veteran tool that has been helping FPGA designers for almost two decades. It is an HDL-based FPGA Design and Simulation solution that supports the newest FPGA devices available from all leading FPGA vendors. The high-performance, mixed-language simulation solution interfaces with nearly one hundred twenty (120) third party vendor tools and provides FPGA designers a single platform that can be used independently. Active-HDL 10.4 supports design creation and simulation of the newest industry-leading FPGA devices from Intel FPGA® (Altera), Lattice®, Microsemi™ (Actel), and Xilinx®.

The 10.4 release of Active-HDL also includes numerous new features, enhancements, and performance optimizations. For additional information, tutorials, free evaluation download and What’s New Presentation, visit

About Aldec

Established in 1984, Aldec is an industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, SoC and ASIC Prototyping, Design Rule Checking, IP Cores, Requirements Lifecycle Management, DO-254 Functional Verification, Embedded Solutions and Military/Aerospace solutions.

Aldec is a registered trademark of Aldec, Inc. All other trademarks or registered trademarks are the property of their respective owners.


Aldec, Inc.
Christina Toole, 702-990-4400
Email Contact

Review Article Be the first to review this article

Bentley: Jump start your Infrastructure Career

Featured Video
Latest Blog Posts
Alex Carrick, Chief Economist at ConstructConnectThe AEC Lens
by Alex Carrick, Chief Economist at ConstructConnect
Canada Stubs Toe Along Jobs Recovery Path
BIM Coordinator for Handel Architects LLP at San Francisco, California
Senior Highway Engineer for RS&H at Jacksonville, Florida
Project Architect for Handel Architects LLP at San Francisco, California
Construction Sales Executive for Microdesk at Los Angeles, California
Senior Software Developer (Revit API) for Microdesk at Boston, Massachusetts
Technical Sales Representative for Rulon International at Saint Augustine, Florida
Upcoming Events
DCW - Digital Construction Week at Excel London United Kingdom - May 19 - 20, 2021
MCA 2021 Virtual Summer Meeting, June 14-16 at United States - Jun 14 - 16, 2021
Kenesto: 30 day trial
Jumpstart Solar Panel
UAV Expo2021 -Register   & save - Countless CAD add-ons, plug-ins and more.

© 2021 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
TechJobsCafe - Technical Jobs and Resumes EDACafe - Electronic Design Automation GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise