sureCore 40nm Ultra-Low Voltage SRAM Proves World Beating Low Voltage Operation in Silicon

0.6V Operation Enables a New Generation of Low Power Applications

SHEFFIELD, England, May 31, 2016 — (PRNewswire) — sureCore Ltd., the Low Power SRAM IP leader, today revealed that its latest Ultra-Low Voltage SRAM IP effectively operates at a record-setting 0.6V across process, voltage and temperature.  The results are silicon-proven on TSMC's 40nm Ultra Low Power CMOS process technology.

The new sureCore 40nmULP SRAM Memory IP runs at an impressive 20MHz down at a record-low 0.6 volts.  At higher voltages, it exceeds 300MHz

sureCore's newest IP delivers an impressive operating voltage range from 0.6V to 1.21V.  It provides an unprecedented 20MHz cycle time at 0.6V scaling to over 300MHz at 1.21V. This performance opens new capabilities for cutting edge wearable and Internet of Things applications.

Test chip results revealed an up to 80% savings in dynamic power consumption and an up to 75% reduction in static power.

"Standard SRAM is not reliable below 0.9V, but sureCore's single supply rail, Ultra-Low Voltage SRAM allows operating voltage to scale in tandem with the logic.  For the first time, devices in 'Keep Alive' mode can deliver useful processing power at unprecedented low power levels.  Just like the 'Duracell Bunny', our SRAM just keeps going!" said sureCore's Executive Chairman, Guillaume d'Eyssautier. 

Key to the break-through is sureCore's "smart-Assist" technology that allows robust operation down to the retention voltage.  Further architectural improvements include subdividing the memory into up to eight banks which, in conjunction with enhanced sleep modes, provide greater system level flexibility.  As well as operating in peripheral power off, light and deep sleep modes, each bank can also be independently controlled for active or in light sleep, deep sleep or power off modes.

Capacities range from 8Kbits to 576Kbits with support for both DFT and BIST (Design-for-Test and Built-in-Self-Test).

"Low power design is placing new demands on SoC developers and, compared to the restrictions imposed by standard memory, our Ultra-Low Voltage SRAM enables a new dimension in low power capability," said Paul Wells, sureCore's CEO.

sureCore's Ultra-Low Voltage SRAM enables computing at formerly unattainable power levels.  By implementing this memory in TSMC 40ULP, the leading low leakage process technology, sureCore has delivered an industry-beating step-change in power performance.

About sureCore
sureCore Limited is an SRAM IP company based in Sheffield, UK, developing low power memories for current and next generation, silicon process technologies. Its award-winning, world-leading, low power SRAM design is process independent and variability tolerant, making it suitable for a wide range of technology nodes. This IP will help SoC developers meet both challenging power budgets and manufacturability constraints posed by leading edge process nodes.

www.sure-core.com

Media contacts




For Europe and Asia:

For America:

Nigel Robson

Chuck Byers

Vortex PR

Business Practicum

nigel@vortexpr.com

byers.charles@yahoo.com

+44 1481 233080

+1-408-310-9244

 

Photo - http://photos.prnewswire.com/prnh/20160531/373717

To view the original version on PR Newswire, visit: http://www.prnewswire.com/news-releases/surecore-40nm-ultra-low-voltage-sram-proves-world-beating-low-voltage-operation-in-silicon-300277107.html

SOURCE sureCore Ltd.

Contact:
sureCore Ltd.
Web: http://www.sure-core.com




Review Article Be the first to review this article
Featured Video
Latest Blog Posts
Alex Carrick, Chief Economist at ConstructConnectThe AEC Lens
by Alex Carrick, Chief Economist at ConstructConnect
The Economy under COVID-19: Notes from the Trenches (40)
Jobs
Mechanical Designer for TechnipFMC at Houston,, Texas
Geographic Information System Analyst II for State of Idaho at Boise, Idaho
GIS Analyst #14713 for State of Missouri at Jefferson City,, Missouri
ROV Pilot II for TechnipFMC at Houston,, Texas
Upcoming Events
BUILDINGSNY -postponed June 17-18, 2020 at Javits Center New York City NY - Jun 17 - 18, 2020
Urban Planning & Architectural Design for Sustainable Development – 5th Edition at Rome,Italy Roma Tre University Rome Italy - Jul 7 - 9, 2020
Cities’ Identity Through Architecture and Arts – 4th Edition at Rome,Italy Rome Italy - Jul 7 - 9, 2020
AEC Next Technology Expo + Conference (NEW DATE), at McCormick Place Chicago IL - Jul 27 - 29, 2020
Kenesto: 30 day trial
Bentley: YII 2020 Awards
CADalog.com - Countless CAD add-ons, plug-ins and more.



© 2020 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
TechJobsCafe - Technical Jobs and Resumes EDACafe - Electronic Design Automation GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise