Cadence Announces Broad IP Portfolio for TSMC 10nm FinFET Process

Close collaboration with TSMC yields 20 percent power reduction and 50 percent area reduction on key IP cores

SAN JOSE, Calif., Sept. 16, 2015 — (PRNewswire) — Cadence Design Systems, Inc. (NASDAQ: CDNS), today announced a broad intellectual property (IP) portfolio for TSMC's 10nm FinFET (N10) process. Cadence has already secured multiple design wins with this portfolio and is actively engaged with customers as adoption of TSMC's leading-edge process grows. The initial deliveries of Cadence IP for the N10 process demonstrate a 20 percent power reduction and 50 percent area reduction compared to TSMC's 16nm process technology, and are ideal for mobile and network infrastructure applications.

Cadence Logo.

The Cadence IP portfolio for N10 includes DDR4, USB 3.0, PCI Express® (PCIe®) 3.0, ADC, PLL and monitoring IP. For detailed product information and availability details, customers should contact their local Cadence salesperson.

"Together with TSMC, we provide innovations that lead to wider adoption of the newest technology nodes in the market," said Hugh Durdan, vice president of marketing for Design IP at Cadence. "As a leading IP supplier, Cadence is well-positioned to enable customers working on 10nm designs to stay ahead of the competition by providing them early IP access to protocols most relevant to their markets."

"The long-term partnership we have with Cadence enables us to work closely from the earliest phases of technology development to deliver initial IP to our customers on our latest process offerings," said Suk Lee, senior director of the Design Infrastructure Marketing Division at TSMC.

About Cadence
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers and research facilities around the world to serve the global electronics industry. More information about the company, its products and its services is available http://www.cadence.com.

© 2015 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence and the Cadence logo are trademarks of Cadence Design Systems, Inc. in the United States and other countries. PCI Express and PCIe are registered trademarks of PCI-SIG. All other trademarks are the property of their respective owners.

For more information, please contact:
Cadence Newsroom
408-944-7039
Email Contact

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To view the original version on PR Newswire, visit: http://www.prnewswire.com/news-releases/cadence-announces-broad-ip-portfolio-for-tsmc-10nm-finfet-process-300143429.html

SOURCE Cadence Design Systems, Inc.

Contact:
Cadence Design Systems, Inc.
Web: http://www.cadence.com




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