Avery Design Systems Announces MIPI UniPro and UFS Verification Solution

ANDOVER, Mass. — (BUSINESS WIRE) — January 11, 2012 — Avery Design Systems Inc., an innovator in functional verification productivity solutions, today announced the MIPI-Xactor verification solution supporting the MIPI UniPro and M-PHY, and JEDEC UFS specifications.

MIPI-Xactor is a complete verification solution consisting of SystemVerilog UVM/OVM/VMM compliant Bus Functional Models (BFM), protocol checkers, directed and random compliance test suites, and reference verification frameworks. The MIPI-Xactor allows design and verification engineers to quickly and extensively test the functionality of UFS and UniPro/M-PHY compliant host and device controller-based designs.

“MIPI-Xactor builds on our solid foundation as a leading supplier of PCI Express and USB verification solutions to IP vendors and semiconductor companies,” said Chris Browy, vice president of sales and marketing of Avery Design Systems. “Our solution enables designers to thoroughly verify their designs functionally adhere to the new UFS and UniPro standards and effectively pinpoint areas of non-compliance or performance bottlenecks.”

Key Features

  • UFS Host
    • Emulates host driver and host controller
    • Supports UFS DME and CPort Users
    • Supports command sets


      - Native UFS

      - SCSI SPC-4, SBC-3, SAM-5

  • UniPro Core
    • Emulates UniPro protocol stack layers and M-PHY
    • Supports all service primitives (SAP) and service data units (x_SDU)
    • DME User supports all sequences of control, configuration, and status primitives
    • Transport service


      - Allocates connections between CPorts

      - Schedules message transfers between CPort Users

    • Supports CPort signal interface
    • Supports UniPro Test Feature
  • M-PHY
    • Multiple LANE provisions
    • LS-MODE and HS_MODE
    • LS-MODE NRZ and PWM signalling schemes
    • Multiple power saving modes

Key BFM Features

  • Layered environment based on family of SystemVerilog classes and methods
  • Abstract data model for transfer, packet, and descriptor types
  • Drivers, event callbacks, and scoreboard options automate status and result checking
  • Robust error injection enables modifying, adding, or deleting frames
  • UFS and UniPro transaction trackers (command and packet exchanges)
  • Throughput calculation for performance analysis
  • Random scenario generation with constraints stress design operation
  • Directed tests for focused functional compliance testing including UFS and SCSI commands and UFS and UniPro power modes
  • Functional coverage monitoring of scenario cases
  • Comprehensive protocol checking
  • VMM/UVM/OVM support

1 | 2  Next Page »



Review Article Be the first to review this article
Featured Video
Latest Blog Posts
Alex Carrick, Chief Economist at ConstructConnectThe AEC Lens
by Alex Carrick, Chief Economist at ConstructConnect
The Math of Inflation and the Self-Correcting Base Level Effect
Jobs
ASIC Architects and Hardware Engineers at D. E. Shaw Research for D. E. Shaw Research at New York, New York
CAD/BIM Specialist for LandDesign Inc. at Charlotte, North Carolina
BIM Specialist - Architecture for Microdesk at Nashua, New Hampshire
Mechanical Engineer Advisor for Halliburton at Houston, Texas
MECHANICAL ENGINEERING for L3Harris at Hamilton,, Canada
GIS Technician for Sanborn at Colorado Springs, Colorado
Upcoming Events
Building Innovation 2022 at Mayflower Hotel MD - Sep 26 - 28, 2022
10th Annual Global EPC Summit London September 2022 at London, UK United Kingdom - Sep 28 - 30, 2022



© 2022 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
TechJobsCafe - Technical Jobs and Resumes EDACafe - Electronic Design Automation GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise